Toshiba Information Systems (Japan) Corporation

Solutions

Delta-sigma ADC IP

Delta-sigma ADC IP Overview

The Delta-Sigma ADC IP developed by Toshiba Information Systems is a second- or third-order high-resolution ADC. A simulation demonstrated a high signal-to-noise ratio of SNDR=100dB (Typ) (at fs=20MHz, fin=10kHz). Evaluation samples are provided.

⊿∑ADC

Process

CMOS 180nm MIN (1.8V/5.0V)

Delta-sigma ADC modulator (3rd order, 1-bit quantization) main electrical characteristics
Power supply voltage 4.5 ∼ 5.5 V
Temperature -40 ∼ 85 °C
Input frequency (fin) DC ∼ 10KHz
Sampling frequency (fs) 20MHz
Over Sampling Ratio 2000 ∼ OSR = (fs/2)/fin
Resolution 16 bit
Input common voltage 1/2 Vdd Ratiometric
SNDR 100 dB (Typ) Simulated value
SFDR 110 dB (Typ) Simulated value

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Various solutions including the proposal of specifications, circuit design and engineering samples are provided upon customer request.

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